1. Field of the Invention
This invention relates to a program executing apparatus provided with a flag for use in process control, and to a program converting method for preparing an instruction described in a language executable by the apparatus, such as machine language.
2. Description of the Related Art
The term "a program executing apparatus" used in this specification refers to an apparatus, such as a microprocessor, for executing a program prepared in an executable data format, such as, consisting of an instruction described in a machine language. A microprocessor is a typical example of such an apparatus, though it is not limited to a single integrated circuit.
The term "a program converting method" refers to a method for converting a program described in a high-level programming language, such as C or FORTRAN, based on grammar understandable for people, to a program including an instruction array in a data format executable by the program executing apparatus. A program before conversion, i.e., a program described in a high-level programming language, will be hereinafter referred to as a source program; a converted program, i.e., a program having an instruction array in a data format executable by the program executing apparatus, will be referred to as an assembler program. Also, an instruction described in a high-level language will be referred to as a high-level instruction; an instruction prepared by a compiler interpreting a high-level instruction will be referred to as a low-level instruction, and generally refers to an assembler instruction.
Referring to FIG. 1 showing a schematic structure of a conventional program executing apparatus, a high-level instruction program is generally translated by a compiler into assembler language, and then by an assembler into machine language. A memory 4 can store a program described in machine language.
An assembler instruction is expressed by means of a code called a mnemonic code, which is defined so as to easily express the function of an instruction. For example, the codes "add", "comp", "tst", and "br" are used to represent an add operation, a compare operation, a bit test operation, and a branch operation, respectively. Generally, each assembler instruction comprises one of the above codes indicative of an operation and one or two operands. Generally, one machine language instruction is created based on one assembler instruction.
An instruction fetching section 2 acts as a fetching means for sequentially fetching the instructions constituting a program from the memory 4, which are expressed in a machine language of a binary format.
A fetched binary instruction is sent to an instruction decoding section 6. In response to the binary instruction, the instruction decoding section 6 controls the operations of a register group 8, an Arithmetic Logic Unit (ALU) 10, a data access section 12, and a flag 14. For example, in response to an instruction which designates a register number, a value is either read from or written in the designated register in the register group 8. The value read from the register is sent to the ALU 10. The ALU 10 then executes an operation according to an operation code included in the instruction, so that the resultant value is stored via the data access section 12 in either the register group 8 or the memory 4. In a case that the operation executed by the ALU 10 accompanies a process for setting a value to a flag, or flag handling, the value of the flag 14 is updated accordingly.
As described above, a compiler converts a source program into an assembler program. Specifically, the compiler interrupts a high-level instruction and reduces it to, generally, two or more low-level instructions.
A compiler is also able to optimize the thus prepared assembler program so as to be adapted to high speed processing. The optimization is achieved through reordering of the assembler instructions. In the reordering, whether or not the instructions depend on each other must be taken into account as the program might otherwise end up with a different result. For example, based on a high-level instruction which instructs "to compare the content of two registers `reg0` and `reg1`, i.e., `R0` and `R1`, so as to branch to a point `LEBEL1` in the program if RL=R0 is held", a compiler makes the following instruction array,
comp/eq reg0, reg1 PA1 br LABEL1. PA1 comp/ge reg0, reg1 PA1 br LABEL1, PA1 comp/gt reg0, reg1 PA1 br LABEL1 PA1 tst reg0, reg1 PA1 br LABEL1
In response to the first instruction "comp/eq rego, reg1", rego and reg1 are compared so that a flag T is set with "1" if R1=R0 is held. Then, in response to the second instruction "br", the operating flow branches to a designated point "LABEL1" if the flag T indicates "1".
These instructions cannot be executed in a reverse order, and desirably include no other instruction or instruction array inserted into between them as that could change the value of the flag T.
Other examples of an instruction array with mutual dependency are shown below.
In response to the following instruction
the operating flow branches to LABEL1 if R1.gtoreq.R0 is held.
In response to the following instruction
the operation flow branches to LEBEL1 if R1&gt;R0 is held.
With the above instructions, the flag T is set with "1" if the R0 and R1 meet a predetermined condition, similar to the first example.
Yet another example is:
In response to the "tst" instruction, a logical product of the content of the two registers `reg0` and `reg1`, i.e., `R0` and `R0`, is calculated so that the flag T is set with the value "1" if the resultant logical product is "0". Further, in response to the "br" instruction, as described above, an operating flow branches to "LABEL1" if the flag T indicates "1". These instructions also have mutual dependency in terms of an execution order (mutual order dependency).
Note that the code "tst" is used to instruct a bit test so as to determine if the value of a predetermined bit of an object value is 0 or 1. For example, in a bit test with respect to R1, R0 is set with a value whose bit corresponding to the bit to be tested (a test bit) of R1 is "1", and a logical product of R1 and R0 is obtained. If the resultant logical product is not "0", it is known that the value of the test bit of R1 is "1". On the other hand, if the local product is "0", it is known that the value of the test bit is "0".
For optimization of an assembler program, a compiler must detect whether or not each instruction in the program is the one, such as "comp/eq", "comp/ge", "comp/gt", or "tst", which accompanies flag handling and therefore depends on other instructions in terms of an execution order.
Conventionally, operations are executed by an ALU, which thus must discriminate a variety of operations. For this discrimination purpose, different codes, such as "comp" and "tst", are used for different operations. As a result, quite a few number of different operation codes are used to discriminate a variety of instructions which accompany flag handling and are thus mutually dependent in terms of an execution order. This resultantly complicates the compiler's judgement to be made when using a program converting method, to detect whether or not each instruction has mutual dependency in terms of an execution order.
Further, the common use of a single flag by a number of different types of instructions will impose severe limitation on mutual order dependency of the instructions and impair productivity in programming by an assembler and readability of an assembler program.